ICL 1900 Series Computers

Order Codes 03x

Octal Order Code Nmenonic Execution
030 ANDS  X  N(M) Logical AND into Store

A 'logical AND' operation is performed with the contents of N(M) and the contents of X, both words being regarded as 24-bit patterns rather than as numeric quantities. A 1-bit is placed in each bit position of N(M) where both N(M) and X have a 1-bit; all other bits of N(M) are set to zero. The contents of X are unaltered.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
031 ORS  X  N(M) Logical INCLUSIVE OR into Store

A 'logical INCLUSIVE OR' operation is performed with the contents of N(M) and the contents of X, both words being regarded as 24-bit patterns rather than as numeric quantities. A 1-bit is placed in each bit position of N(M) where either N(M) or X, or both, have a 1-bit. The contents of X are unaltered.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
032 ERS  X  N(M) Logical EXCLUSIVE OR into Store

A 'logical EXCLUSIVE OR' operation is performed on the contents of N(M) and the contents of X, both words being regarded as 24-bit patterns rather than as numeric quantities. The ERS instruction places a 1-bit in N(M) only where the corresponding bits of N(M) and X are different. The contents of X are unaltered.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
033 STOZ    N(M) Store Zero

The STOZ instruction clears the storage location whose address is given by N(M).

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
034 DCH  X  N(M) Deposit Character

In its unmodified form the DCH instruction will make bits 18 to 23 (the least significant character) of N equal to bits 18 to 23 of X. The remaining bits of N and all of X are left unchanged.

The DCH instruction may be modified by an accumulator whose contents takes the form of a character index word (see BCHX).

When so modified the instruction deposits the character from bits 18 to 23 of X into the word specified by the sum of N and bits 9 to 23 of the index word, at the character position (n0 to n3) specified by bits 0 and l on the index word.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
035 DEX  X  N(M) Deposit Exponent

The DEX instruction causes bits 15 to 23 of N(M) to be made equal to bits 15 to 23 of X. Bits 0 to 14 of N(M) and all of X are left unchanged.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
036 DSA  X  N(M) Deposit Short Address

The DSA instruction causes bits 12 to 23 of N(M) to be made equal to bits 12 to 23 of X. Bits 0 to 11 of N(M) and all of X are left unchanged.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.
037 DLA  X  N(M) Deposit Long Address

The DSA instruction causes bits 9 to 23 of N(M) to be made equal to bits 9 to 23 of X. Bits 0 to 8 of N(M) and all of X are left unchanged.

C is not used and will be left clear.

V is not used and remains unchanged.

Modification This statement has an M field. When modified, the least significant 15 bits of N + M are taken as the operand. In the extended data mode, the least significant 22 bits of N + M are taken as the operand.